Referring to FIG. 1, a diagram is shown illustrating a layout of a conventional two-finger high electron mobility transistor (HEMT) 10. The two-finger HEMT 10 is the most basic transistor used in a frequency range up to at least 50 GHz. The two-finger HEMT typically has a gate width of 75 microns. The two-finger HEMT 10 is essentially a parallel combination of two transistors side-by-side. FIG. 2 is a schematic diagram illustrating a DC equivalent circuit for the two-finger HEMT 10 of FIG. 1. A gate line 12 on the left of the two-finger HEMT 10 feeds two very thin gate fingers. The gate fingers control two channel currents flowing from a central common drain line 14 to two source pads 16. The source pads 16 are usually grounded with “via-holes” 18 in the center of the source pads 16. A cross-section of the two-finger HEMT 10 at section line A-A is illustrated in FIG. 3.
The basic device represented by the two-finger HEMT 10 has been extensively measured, modeled and used. The main limitation of the conventional two-finger HEMT 10 is in the power handling and third order intercept point (OIP3) capability. The OIP3 is an inverse measure of the magnitude of unwanted intermodulation products and is generally 10 to 15 dB above P1dB. P1dB is the maximum output power before significant compression begins. P1dB is typically just a few dB below the saturated power. OIP3 and P1dB are industry-standard terms.
High output power is usually necessary in transmitters. Good intermodulation performance is also important to avoid spectral regrowth and inter-symbol interaction when using wide bandwidth modulation schemes. What is not so apparent is that high OIP3 values are also needed in receivers to avoid increased bit error rate (BER) due to intermodulation products from high-level nearby interfering signals. To handle higher power and to increase OIP3, larger transistors with four or eight fingers are constructed. Gate finger width (i.e., the length of the gate lines in FIG. 1) could also be increased. However, increasing the length of the gate lines also increases gate resistance and delay. The increase in gate resistance and delay reduces high-frequency performance.
Referring to FIG. 4, a diagram of a four-finger HEMT 20 is shown illustrating a layout of a larger conventional transistor that finds common use. The four-finger HEMT 20 is simply a doubling of the two-finger HEMT 10. A cross-section of the four-finger HEMT 20 along section line B-B is illustrated in FIG. 5. The four-finger HEMT 20 takes twice the current of the two-finger HEMT 10 and achieves almost twice the output power. Surprisingly, however, P1dB and OIP3 values for the four-finger HEMT 20 are not quite doubled. The reason was not previously well understood but some recent ground-breaking research has provided the ability to study the operation of individual fingers in the larger devices and to design custom structures. The research has also allowed the performance of structures to be predicted without multiple prototyping runs. Importantly, the reason for the reduced performance in larger devices has been identified.
The first issue identified can be explained without resorting to complex analysis by the following reasoning, which is based on the four-finger HEMT 20 illustrated in FIG. 4. In a typical four-finger device, a central source pad 22 is shared between the two central fingers, whereas outer source pads 24 are not shared. The central source pad 22, therefore, has twice the current to ground relative to that in each outer source pad 24. HEMTs designed for millimeter-wave operation typically have a quiescent current of around 20 mA per gate finger and when operating at high power, the current swings from almost zero to 40 mA per finger. The source pads 22 and 24 are connected to ground through via-holes 26. The source pad connection to ground through via-hole 26 has an inductive reactance of around 6 ohms to ground at 50 GHz. When operating at high power, the central source pad 22 has an RF voltage to ground of V=IZ=2×40 mA×6 ohms=480 mV (peak to peak). In contrast, the outer source pads 24 will have half the voltage of the central source pad 22 or 240 mV due to the lower current. Although the above figures do not appear large, even small impedances in the source line can have quite large effects.
The outer fingers then have half the RF voltage on their source pads compared to the inner fingers. An alternative way of looking at this is that the central fingers share the inductance to ground and effectively see double the inductance as a result. To remove this unbalance, the central source (or sources in, e.g., eight-finger devices) could be separated into two separate pads, but separating the central source pad(s) would result in a physically larger device, and chip area is expensive. This is especially true for the eight-finger devices.
A study, which looked at the larger transistors, found that the outermost fingers contribute 3.0 dB less than optimal as the load impedance experienced by the outermost fingers is affected by the effective source inductance of the outermost fingers, which is approximately half that of the other fingers, all of which share back-via connections to ground. In large power transistors, the outermost fingers have only half the expected contribution to the overall OIP3 due to the different geometry of the surrounding metal that they see. The outermost fingers in the large power transistors use the same DC as the other fingers, but do not contribute equally due to their need to see a quite different load impedance due to the different geometry. The result is that in eight-finger devices, the overall device OIP3 is almost 1 dB less than expected. The same thing happens in both four and eight-finger devices, and even in larger devices.
Additionally, in a conventional eight-finger transistor, the optimal load is not presented simultaneously to all gate fingers. The inner-facing, outer fingers contribute 0.7 dB less than optimal to the linearity of the device as the additional length along the drain combiner shifts the load impedance experienced by those gate fingers. The outermost fingers contribute 3.0 dB less than optimal as the load impedance experienced by the outermost fingers is further affected by the respective effective source inductance, which is approximately half of the other fingers, all of which share back-via connections to ground.
It would be desirable to implement a multi-finger HEMT layout providing improved third order intercept point (OIP3) and saturated output power performance (Psat).